This invention relates generally to semiconductor materials. More particularly, it relates to a method for growing epitaxial Ge-rich SiGe layers on Si substrates using single source (H3Ge)xSiH4-x precursor compounds incorporating SiGe, SiGe2, SiGe3 and SiGe4 building blocks.
The growth of Si1-xGex alloys on Si(100) substrates has been the subject of intensive research over the past two decades due to applications in high frequency electronic devices. Several comprehensive reviews describing fundamental issues related to materials and devices based on Si-rich alloys have been written recently. These include P. M. Mooney and J. O. Chu, “SiGe Technology: Heteroepitaxy and High-Speed Microelectronics”, Annu, Rev. Mater. Sci., vol. 30, 2000, pp. 355-362; M. Tromp and F. M. Ross, “Advances in situ ultra-high vacuum electron microscopy: Growth of SiGe on Si”, Annu. Rev. Mater. Sci., vol. 30, 2000, pp. 431-449; and K. Brunner, “Si/Ge nanostructures”, Rep. Prog. Phys. vol. 65, No. 1, January 2002, pp. 27-72.
From a synthesis viewpoint, the two most commonly used techniques for the heteroepitaxial growth of Si1-xGex on Si, are molecular beam epitaxy (MBE) utilizing solid Si and Ge sources, and ultrahigh vacuum chemical vapor deposition (UHV-CVD) or gas-source MBE utilizing common hydrides such as silane (SiH4) and germane (GeH4) or disilane (Si2H6) and digermane (Ge2H6). Such growth by MBE is described in more detail in J. C. Bean, L. C. Feldman, A. T. Fiory, S. Nakahara and I. K. Robinson, “GexSi1-x/Si strained-layer superlattice grown by molecular-beam epitaxy”, J. Vac. Sci. Technol. A, vol. 2, No. 2, 1984, pp. 436-440. Growth by gas source MBE is described in more detail by D. W. Greve, “Growth of epitaxial germanium-silicon heterostructures by chemical vapour deposition”, Mat. Sci. Eng. B, vol. 18, No. 1, February 1993, pp. 22-51.
There are two main objectives for developing these materials on Si wafers. The first is the formation of strained, defect-free Si1-xGex films, which may take the form of strained layer superlattices, as described by J. C. Bean, L. C. Feldman, A. T. Fiory, S. Nakahara and I. K. Robinson, “GexSi1-x/Si strained-layer superlattice grown by molecular-beam epitaxy”, J. Vac. Sci. Technol. A, vol. 2, No. 2, 1984, pp. 436-440. The second is the growth of coherent islands and quantum dots. Until very recently the focus has been concentrated on growth of Si-rich systems which are used for the fabrication of high speed electronics integrated with Si. The Ge-rich analogs are much less developed in spite of their great potential in future generations of optoelectronic devices including multi quantum well emitters, photodetectors, sensors and high-speed modulators covering a wide range of IR wavelengths, including the communications wavelength of 1.55 μm. See U. Konig and F. Schaffler, “P-type Ge channel MODFETS with high transconductance grown on Si substrates”, IEEE Electron Device Lett., vol. 14, No. 5, April 1993, pp. 205-207.
Fabrication of Si1-xGex alloys across the entire compositional range is highly desirable to achieve comprehensive band gap and strain engineering in the Si—Ge system. Materials with Ge rich concentrations are particularly desirable for the development of virtual substrates and buffer layers on Si for numerous device applications based on strained group IV materials and for integration of III-V and II-VI optical semiconductors with Si electronics.
Si1-xGex layers with strain-free microstructure and variable compositions and lattice constants are currently used in industrial processes as virtual substrates for growth of high mobility electronic devices based on strained Si and Ge films (channels). See M. T. Currie, S. B. Samavedam, T. A. Langdo, C. W. Leitz, and E. A. Fitzgerald, “Controlling threading dislocation densities in Ge on Si using graded SiGe layers and chemical-mechanical polishing”, Appl. Phys. Lett., vol. 72, No. 14, April 1998, pp. 1718-1720. By introducing a tensile in-plane strain in the Si channel, the electron and hole mobilities of Si can be dramatically enhanced in conventional complementary metal on oxide semiconductor (CMOS) field effect transistors. The standard material stack for strained Si CMOS devices incorporates a bulk Si (or SOI) substrate, a thick Si1-xGex buffer layer (with a single composition, or graded linearly or in steps, or with multiple compositions) and a thin tensile-stressed Si channel layer, typically 100-500 Å thick. See P. M. Mooney and J. O. Chu, “SiGe Technology: Heteroepitaxy and High-Speed Microelectronics”, Annu. Rev. Mater. Sci., vol. 30, 2000, pp. 355-362. CMOS devices are subsequently built on top of the strained Si channel using conventional CMOS processing. Si1-xGex buffer layers with high Ge content (x=0.50-0.70) are needed to achieve high mobilities in strained Si channels grown on these buffer layers. The mobilities increase monotonically with increasing x and become three times higher than that of bulk Si for x=0.70, as described by M. L. Lee, and E. A. Fitzgerald, “Hole mobility enhancements in nanometer-scale strained-silicon heterostructures grown on Ge-rich relaxed Si1-xGex”, J. Appl. Phys. vol. 94, November 4, August 2003, pp. 2590-2596. High mobility strained Si and Ge are used in high performance field-effect transistors (FET) and bipolar transistors. Extremely high mobility p-channel modulation-doped FETs have been demonstrated in heterostructures involving compressively strained Ge layers grown on Ge-rich Si1-xGex. See U. Konig and F. Schaffler, “P-type Ge channel MODFETS with high transconductance grown on Si substrates”, IEEE Electron Device Lett., vol. 14, No. 5, April 1993, pp. 205-207; R. Hammond, S. J. Koester, and J. O. Chu, “High-performance 0.1 mu m gate-length Ge/Si0.4Ge0.6 p-channel MODFETs”, Electron. Lett. vol. 35, No. 18, September 1999, pp. 1590-1591.
The Si1-xGex, buffer layers and virtual substrates need to fulfill a number of materials requirements such as low dislocation densities, low surface roughness as well as uniformity of strain, Ge content, and layer thickness. Low surface roughness and reduced threading defect densities are particularly important to ensure a uniform spatial stress distribution in the Si and Ge overlayer channels, and to prevent interface scattering which can compromise the strained-enhanced carrier mobility. The Ge-rich Si1-xGex films, as grown on Si under conventional temperatures, however, possess high dislocation densities and surface roughness, due to the large lattice mismatch between the films and the substrate. See M. T. Currie, S. B. Samavedam, T. A. Langdo, C. W. Leitz, and E. A. Fitzgerald, “Controlling threading dislocation densities in Ge on Si using graded SiGe layers and chemical mechanical polishing”, Appl. Phys. Lett. 72, 1718 (1998). Surface roughness in these systems can develop either through strain relaxation or as a result of non-uniform mass distribution on the surface, which in turn can promote dislocation formation at localized regions with high stress.
Previously known synthetic strategies for development of smooth Si1-xGex buffer layers on Si are based on growth of thick compositionally graded films in which the Si and Ge content in the buffer layer is varied up to 100% Ge. The misfit strain between the Si1-xGex epilayer and Si substrate is gradually relieved with increasing film thickness, as described by Y. J. Mii, Y. H. Xie, E. A. Fitzgerald, D. Monrow, F. A. Thiel, B. E. Weir, and L. C. Feldman, “Extremely high electron-mobility in Si/GexSi1-x structures grown by molecular-beam epitaxy”, Appl. Phys. Lett. vol. 59, No. 13, September 1991, pp. 1611-1613; P. M. Mooney, J. L. Jordan-Sweet, K. Ismail, J. O. Chu, R. M. Feenstra, and F. K. LeGoues, “Relaxed Si0.7Ge0.3 buffer layers for high-mobility devices”, Appl. Phys. Lett. vol. 67, No. 16, October 1995, pp. 2373-2375, and M. T. Currie, S. B. Samavedam, T. A. Langdo, C. W. Leitz, and E. A. Fitzgerald, Appl. Phys. Lett. 72, 1718 (1998). Typically, an average grading rate of 10% Ge/μm is employed over the entire SiGe layer thickness. As described by M. T. Currie, et al., for a 50% Ge concentration a layer thickness of 5-10 μm is required to achieve material having dislocation densities of 6×106 cm−2 and surface roughness with RMS values of ˜30 nm. For Ge contents higher than 50% the defect densities and film roughness become much worse due to the increase in the lattice mismatch. This requires an even greater film thickness to achieve acceptable defect densities and a chemical-mechanical polishing (CMP) step to smoothen the surface before growing additional device structures. The resulting extreme film thickness and the CMP step make processing of the devices very expensive and in some cases even create additional problems such as degradation of key film properties.
An alternative approach has been reported to produce Si1-xGex buffer layers on Si substrates via solid source MBE. This approach is described by K. K. Linder, F. C. Zhang, J.-S. Rieh, P. Bhattacharya, and D. Houghton, “Reduction of dislocation density in mismatched SiGe/Si using a low-temperature Si buffer layer”, Appl. Phys. Lett. vol. 70, No. 24, June 1997, pp. 3224-3226. In this method, a low temperature nucleation layer of pure Si is deposited directly on the substrate surface at 400° C. Next, a series of distinct Si1-xGex epilayers with sequentially increasing Ge fractions is grown on the Si buffer layer. These are ultimately utilized as templates for growth of Ge-rich and strain free top layers, which display low surface roughness and reduced defect densities (˜5×106/cm2). See C. S. Peng, Z. Y. Zhao, H. Chen et al., “Relaxed Ge0.9Si0.1, alloy layers with low threading dislocation densities grown on low-temperature Si buffers”, Appl. Phys. Lett. vol. 72, No. 24, June 1998, pp. 3160-3162. There are disadvantages to this approach, however, including use of a multi-step complicated procedure involving growth of several to many layers (depending on Ge concentration) and the use of MBE techniques which are not viable for cost-effective large-scale applications in commercial Si—Ge based technologies.
It is an objective of the present invention, therefore, to provide a straightforward, cost effective method that produces Si—Ge heterostructures with high Ge contents on Si substrates.
It is yet another object of this invention to provide a low temperature method that yields Si—Ge films with high Ge contents on Si substrates.
It is still another object of the present invention to provide a semiconductor structure having thin buffer layers grown directly on Si, which layers display planar surface morphologies, low densities of threading defects (less that 105-106/cm2), strain free microstructure, sharp and well-defined interfaces and homogeneous elemental profiles at the atomic level.
It is yet another object of the present invention to provide high Ge content Si—Ge/Si heterostructures suitable for application in IR optoelectronics as well as SiGe films on low temperature substrates for applications in photovoltaics and flexible displays.
Additional objects and advantages of the invention will be set forth in the description that follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations pointed out in the appended claims.